Epitaxial substrate and method for forming the same

ABSTRACT

An epitaxial substrate and a method for forming the same are disclosed. The epitaxial substrate includes a substrate, a deposition layer, a buffer layer and an epitaxial layer. The deposition layer is directly formed on the substrate, wherein the deposition layer includes a gradient doping concentration, and has a first surface and a second surface which are opposite to each other; the gradient doping concentration has a minimum value at the first surface. The buffer layer is formed on the deposition layer, and an epitaxial layer is formed on the buffer layer. The epitaxial layer is mainly formed of group III-V nitride. The substrate and the deposition layer are formed of homogeneous material. Since the deposition layer is directly formed on the substrate, and the deposition layer and the substrate are formed of a homogeneous material, the epitaxial substrate includes a good heat dissipation efficiency and low leakage current.

BACKGROUND OF THE INVENTION 1. Technical Field

The present invention is related to semiconductor substrates, and moreparticularly related to an epitaxial substrate and a method for formingthe same.

2. Description of Related Art

For conventional semiconductor manufacturing process, an epitaxial layeris grown on a surface of a SiC or sapphire substrate, and then asemiconductor device or a circuit is formed on the epitaxial layer.

To meet the requirement for the high-power and high-frequencysemiconductor applications, it is necessary for the semiconductordevices to be able to sustain a higher breakdown voltage and to reducethe leakage current from the substrate as much as possible. Forinstance, the introduction of SOI wafer (Silicon on insulator wafer) isto reduce the leakage current from the substrate. In conventional SOIsubstrates, an oxide layer (e.g. SiO₂) is usually added into two siliconsubstrates to be used as an insulator and a bonding layer. However, itis known that the oxide layer is a bad heat conductor. Therefore, it isfrequently seen that the SOI substrate made by the conventional SOIprocess usually includes a drawback of low heat dissipation efficiency.

In addition, for different application purpose, the requirements of theheat dissipation performance, thermal endurance for the substrate couldbe different. For instance, for RF devices, since an operationtemperature thereof is as high as 400° C., the operation performance ofthe RF devices would be affected if the heat dissipation efficiency ofthe substrate is bad.

Hence, it is still a need to provide a substrate which could have astrong strength, low leakage current, thermally stable at a hightemperature, and good heat dissipation performance.

BRIEF SUMMARY OF THE INVENTION

In view of the above, an object of the present invention is to providean epitaxial substrate which could be thermally stable at a hightemperature and has a low leakage current.

The present invention provides an epitaxial substrate, including asubstrate; a deposition layer formed on the substrate directly, whereinthe deposition layer includes a gradient doping concentration, and has afirst surface and a second surface which are opposite to each other; thegradient doping concentration has a minimum value at the first surface;a buffer layer formed on the deposition layer; and an epitaxial layerformed on the buffer layer, and the epitaxial layer is mainly formed ofgroup III-V nitride; wherein, the substrate and the deposition layer areformed of homogeneous material.

The present invention also provides a method for forming an epitaxialsubstrate, including steps of providing a substrate; forming adeposition layer on the substrate, wherein the deposition layer and thesubstrate are formed of homogeneous material; the deposition layerincludes a gradient doping concentration and has a first surface and asecond surface which are opposite to each other; the gradient dopingconcentration has a minimum value at the first surface; the depositionlayer includes a gradient resistivity which includes a high impedancelayer region having a resistivity at least greater than 1500 ohm-cm;forming a buffer layer on the deposition layer; and forming an epitaxiallayer on the buffer layer, wherein the epitaxial layer is mainly formedof group III-V nitride.

The advantage of the present invention is that since the depositionlayer is directly formed on the substrate, and the deposition layer andthe substrate are formed of a homogeneous material, whereby theepitaxial substrate could include a good heat dissipation efficiency andlow leakage current.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

The present invention will be best understood by referring to thefollowing detailed description of some illustrative embodiments inconjunction with the accompanying drawings, in which

FIG. 1 to FIG. 2 are cross-sectional views of an epitaxial substrateaccording to a first embodiment of the present invention; and

FIG. 3 is a cross-sectional view of an epitaxial substrate according toa second embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will now be described in detail with reference toan embodiment thereof as illustrated in the accompanying drawings. Asillustrated in FIG. 1 and FIG. 2, an epitaxial substrate 100 of a firstembodiment according to the present invention includes a substrate 10, adeposition layer 20, a buffer layer 30, and an epitaxial layer 40,wherein a method for forming the epitaxial substrate 100 of theembodiment would be described hereinafter.

First, step A is performed: providing a substrate. Wherein, in thecurrent embodiment, the substrate 10 is a silicon substrate, andpreferably, a heavily doped silicon substrate as an example; thesubstrate 10 includes a substrate doping concentration, wherein thesubstrate doping concentration is equal to or greater than 1×10¹⁸atom/cm³. The substrate 10 could be doped with a donor dopants oracceptor dopants, such as Boron (B), Aluminum (Al), Gallium (Ga),Phosphorus (P), Arsenic (As), Antimony (Sb) or a combination thereof,although this is not a limitation to other practical applications. Then,step B is performed: forming a deposition layer on the substrate,wherein the deposition layer and the substrate are of the same material.Wherein, the deposition layer includes a gradient doping concentrationand has a first surface and a second surface which is opposite to thefirst surface; a minimum value of the gradient doping concentration isformed at the first surface.

For instance, in the current embodiment, the deposition layer 20 isdirectly deposited on substrate 10 through an MOCVD process to form ahomogeneous layer with the Silicon substrate. Wherein, the dopingconcentration of the deposition layer 20 is lower than a dopingconcentration of the substrate 10; the deposition layer 20 is formed ofa lightly doped or undoped, pure single crystal silicon. For instance,the deposition layer 20 is lightly doped with a dopant selected from thesame dopant or a different dopant from that of the first substrate 10.The deposition layer 20 includes a first surface 20 a and a secondsurface 20 b, wherein the deposition layer 20 is directly connected tothe substrate 10 via the second surface 20 b. During thehigh-temperature annealing process, the lightly doped dopants of thedeposition layer 20 would be heated to diffuse and form a gradientdoping concentration. In another embodiment, the dopants of the heavilydoped substrate 10 could diffuse into the undoped deposition layerduring the high-temperature thermal treatment, thereby forming agradient doped concentration. In addition, the gradient dopingconcentration deposition layer 20 decreases toward a direction away fromthe substrate 10, wherein the gradient doping concentration includes aminimum value at the first surface 20 a, and the gradient dopingconcentration includes a maximum value at the second surface 20 b. It isworth mentioning that, the difference and the similarities of theselected dopants could include, but not limited to, different kinds ofthe dopants, different types of conductivity, different dopantconcentrations, etc.

Also, the deposition layer 20 includes a gradient resistivity, whereinthe gradient resistivity includes a maximum value at the first surface20 a of the deposition layer 20, for example, the resistivity of thedeposition layer 20 increases from the second surface 20 b to the firstsurface 20 a. Particularly, in the gradient distribution of theresistivity, the deposition layer 20 includes an impedance layer region22 which has a resistivity at least greater than 1500 ohm-cm, andpreferably, greater than 7000 ohm-cm, wherein a thickness of the highimpedance layer region is smaller than or equal to 6 μm, and preferably,smaller than 2 μm.

In addition, the method for forming the deposition layer 20 not onlycould include an epitaxial growth method (e.g. CVD, or MOCVD process),but also includes sputtering deposition or directly bonding. The MOCVDprocess is not a limitation of the present invention.

Next, step C is performed: forming a buffer layer on the depositionlayer. For instance, in the current embodiment, a buffer layer 30 isformed on the first surface 20 a of the deposition layer, wherein thebuffer layer 30 is mainly formed of Aluminum gallium nitride(Al_(x)Ga_(1-x)N, wherein 0≤x<1), although this is not a limitation ofthe present invention. In other embodiments, the buffer layer 30 alsocould be formed of other materials.

Then, step D is performed: forming an epitaxial layer on the bufferlayer, wherein the epitaxial layer is mainly formed of group III-Vnitride. For instance, in the current embodiment, an epitaxial layer 40is formed the buffer layer 30 by epitaxial growth, wherein the epitaxiallayer 40 is mainly formed of GaN. The buffer layer 30 is adapted tobuffer the epitaxial layer 40 and the deposition layer 20 to reduce alattice defect density and increase a strain compensation of latticematching.

Whereby, with the characteristic of the high resistivity of the highimpedance layer region 22 in the deposition layer could effectivelyprevent the electric current which is produced in the forming steps ofthe semiconductor devices or circuits from flowing through depositionlayer 20 to reduce leakage current during the following MOCVD processfor epitaxial growth or device manufacturing process.

Furthermore, since the substrate 10 and the deposition layer 20 aredirectly connected to each other and formed of homogeneous materialwithout a heterogeneous structure therebetween. Hence, the substrate ofthe present invention includes a better heat dissipation efficiencywhich is more suitable for operating in a high-temperature environmentas compared to the conventional structure which includes an oxide layerformed between two substrates or the substrate and the epitaxialstructure.

The following table illustrates the experiment parameters and theexperimental data of the epitaxial substrate which is formed by themethod of the above embodiment. Wherein, a thickness of the highimpedance layer region is defined as a first distance D1 which issubstantially a vertical distance between a third surface 22 a to afourth surface 22 b; a diffusion depth of the high impedance layerregion is defined as a second distance D2 which is substantially avertical distance between the fourth surface 22 b to the second surface20 b.

Wherein, the substrates of Experiment 1 and Experiment 2 are bothselected from silicon substrates which are doped with P+ dopants, suchas Boron; the silicon substrates all include a doping concentrationgreater than 1×10¹⁹ atom/cm³, a resistivity of about 0.0035 ohm-cm, anda thickness of the silicon substrate is about 1000 am.

The deposition layers of Experiment 1 and Experiment 2 are formed of asilicon deposition layer which is homogeneous with the siliconsubstrate, wherein the deposition layer is doped with N− dopants, suchas phosphorus, and includes a thickness of about 25 am; all of thedeposition layers are formed by an epitaxial process at a temperature ofabout 1150° C. for 310 sec. Wherein, the difference of the depositionlayers of Experiment 1 and Experiment 2 is that a doping concentrationof the deposition layer of Experiment 1 is about 5000 ohm-cm, and adoping concentration of the deposition layer of Experiment 2 is about10000 ohm-cm.

The epitaxial layer of Experiment 1 and Experiment 2 is mainly formed ofGaN, which is formed on the deposition layer by an epitaxial process ata temperature of about 1000° C. for 6 hr. By utilizing the depositionlayers having different resistivities, the high impedance layer regionof Experiment 1 has a diffusion depth of about 1.82 μm, a thicknesswhich is smaller than 2 μm, and a resistivity which is greater than 7000ohm-cm; the high impedance layer region of Experiment 2 has a diffusiondepth of about 1.86 μm, a thickness which is smaller than 2 am, and aresistivity which is greater than 15000 ohm-cm.

From the above experiment results, the method of the present inventioncould provide an epitaxial substrate including a high impedance layerregion with a high resistivity. For example, each of the high impedancelayer regions obtained in Experiment 1 and Experiment 2 includes athickness which is smaller than 2 am, a resistivity which is greaterthan 7000 ohm-cm or 15000 ohm-cm. With the high resistivity of the highimpedance layer region, it could prevent the electric current which isproduced in the forming steps of the semiconductor devices or circuitsfrom flowing through deposition layer to reduce leakage current in thefollowing process. In addition, since the substrate and the depositionlayer are formed of a homogeneous material in an epitaxial process, theperformance of the heat dissipation of the substrate could be furtherimproved, which enables a broader range of applications.

Experiment 1 Experiment 2 Silicon Concentration >1E19 (atom/cm³) >1E19(atom/cm³) substrate Resistivity 0.0035 (ohm-cm) 0.0035 (ohm-cm)Thickness 1000 (μm) 1000 (μm) Dopant P+, such as Boron P+, such as BoronDeposition Concentration <1E12 (atom/cm³) <1E12 (atom/cm³) layer (Si-Resistivity 5000 (ohm-cm) 10000 (ohm-cm) epi) Thickness 25 (μm) 25 (μm)Dopant N−, such as N−, such as Phosphorus Phosphorus Process 1150°C./310 sec 1150° C./310 sec Epitaxial Process 1000° C./6 hr 1000° C./6hr layer (GaN) High Diffusion 1.82 (μm) 1.86 (μm) impedance Depth layerregion Thickness <2 (μm) <2 (μm) Resistivity >7000 (ohm-cm) >15000(ohm-cm)

FIG. 3 illustrates an epitaxial substrate 200 of a second embodimentaccording to the present invention, wherein the epitaxial substrate 200includes a structure and a forming method which are similar to those ofthe epitaxial substrate 100 of the above embodiment. The epitaxialsubstrate 200 also includes a substrate 210, a deposition layer 220, abuffer layer 230 and an epitaxial layer 240.

Wherein, the substrate 210 is a heavily-doped p-type silicon substrateas an example, which includes a substrate doping concentration;preferably, the substrate doping concentration is equal to or greaterthan 1×10¹⁸ atom/cm³. In the current embodiment, the substrate 210 couldbe doped with a donor dopant or an acceptor dopant, such as Boron (B),Aluminum (Al), Gallium (Ga), Phosphorus (P), Arsenic (As), Antimony (Sb)or a combination thereof, although this is not a limitation of otherpractical applications.

The deposition layer 220 is directly formed on the substrate 210. Forinstance, the deposition layer 220 could be formed by an epitaxialgrowth method (e.g. CVD, or MOCVD process), but also includes sputteringdeposition or directly bonding, although this is not a limitation toother practical applications.

Especially, the deposition layer 220 is a stacked-layer structure, whichat least includes a first stacked layer 222 and a second stacked layer224. Wherein, in one embodiment, a method of forming the stacked-layerstructure includes forming the first stacked layer 222 on a surface ofthe substrate 210, and then forming the second stacked layer 224 on thefirst stacked layer 222 such that the first stacked layer 222 is on thesubstrate 210 and is disposed between the substrate 210 and the secondstacked layer 224; the dopants of the first stacked layer 222 and thesubstrate 210 could be the same or different, for example, in thecurrent embodiment, the dopants of the first stacked layer 222 and thesubstrate 210 are different; the dopants of the second stacked layer 224and the first stacked layer 222 could be the same or different, forexample, in the current embodiment, the dopants of the second stackedlayer 224 and the first stacked layer 222 are different. The firststacked layer 222 and the second stacked layer 224 include the dopantsand the doping concentration which are chosen to be utilized as adiffusion barrier layer, i.e., could control the diffusion rate of thedopant ions and prevent the dopants of the heavily doped substrate 210from diffusing into the high impedance layer region.

The deposition layer 220 includes a first surface 220 a and a secondsurface 220 b which are opposite to each other, wherein the gradientdoping concentration of the deposition layer 220 has a minimum value atthe first surface 220 a; on the other hand, the deposition layer 220includes a gradient resistivity which has a maximum value at the firstsurface 220 a of the deposition layer 220, and the gradient resistivitydecreases toward the second surface 220 b. It is worth mentioning thatthe deposition layer 220 includes an impedance layer region which has aresistivity at least greater than 1500 ohm-cm, wherein the highimpedance layer region could be formed in any region of the depositionlayer 220. Meanwhile, the deposition layer 220 is a stacked layerstructure having multiple layers, while the first stacked layer 222 andthe second stacked layer 224 also could be alternately stacked to formthe multiple layers depending on the different requirement of thedevices. The stacked layer structure could be adapted to control iondiffusion rate. Hence, in practice, the ion diffusion rate could becontrolled by adjusting the number of layers, the thickness and thedopants of the stacked layer structure, and thereby to modify a formingregion of the high impedance layer region.

Next, a buffer layer 230 is formed on the deposition layer 220 by anepitaxial growth method. In the current embodiment, the buffer layer 230is mainly formed of Aluminum gallium nitride (Al_(x)Ga_(1-x)N, wherein0≤x<1), although this is not a limitation of the present invention. Inother embodiments, the buffer layer 230 also could be formed of othermaterials.

Then, an epitaxial layer 240 is further formed on the buffer layer 230by the epitaxial process. Wherein, the epitaxial layer 240 is mainlyformed of group III-V nitride. For instance, in the current embodiment,the epitaxial layer 40 is mainly formed of GaN. The buffer layer 230 isadapted to buffer the epitaxial layer 240 and high impedance layer 224to reduce a lattice defect density and increase a strain compensation oflattice matching.

With the high resistivity of the deposition layer region 220, especiallythe high resistivity of the high impedance layer region, the epitaxialsubstrate 200 could avoid the electric current which is produced in theforming steps of the semiconductor devices or circuits from flowingthrough the impedance layer region to reduce leakage current in thefollowing process, such as the epitaxial growth process of CVD or MOCVD,or other process. In addition, since the epitaxial substrate of thecurrent embodiment is also thermally stable at a high temperature, noteasy to deform and good heat dissipation efficiency, whereby theepitaxial substrate of the current embodiment is especially suitable foroperating in a high-temperature environment.

Wherein, the substrate is a p-type doped silicon substrate as anexample, however, the substrate also could be n-type doped siliconsubstrate in other embodiments; the substrate could be doped with adonor dopant or an acceptor dopant, such as Boron (B), Aluminum (Al),Gallium (Ga), Phosphorus (P), Arsenic (As), Antimony (Sb) or acombination thereof, although this is not a limitation of otherpractical applications. In addition, when the n-type doped substrate isutilized, the dopants of the barrier layer could be replaced with n-typedopants, and are limited to the p-type dopants.

The above description is related to some embodiments of the presentapplication only. It is worth mentioning that the material of thesubstrate and the deposition layer could be selected according to thelattice matching between the substrate and the deposition layer, and arenot limited to the silicon substrates and the silicon deposition layer.In some embodiments, the material of the substrate and the depositionlayer includes single crystal, polycrystal and amorphous material; insome embodiments, the material of the substrate and the deposition layerincludes SiC, GaAs, GaP, InP, InAs, and/or InSb, etc.; in someembodiments, the material of the substrate and the deposition layerincludes SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP and/or GaInAsP,etc.; other suitable materials also could be utilized.

In addition, in embodiments, the substrate and the deposition layercould be selected from sapphire, GaO, LiGaO, LiAlO, Spinel, Ge, Glass,ZrB₂, ScALMgO₄, SrCu₂O₂, LiGaO₂, LiAlO₂, YSZ (Yttria-StabilizedZirconia), or other suitable material.

It must be pointed out that the embodiments described above are onlysome embodiments of the present invention. All equivalent structureswhich employ the concepts disclosed in this specification and theappended claims should fall within the scope of the present invention.

What is claimed is:
 1. An epitaxial substrate, comprising: a substrate;a deposition layer formed on the substrate directly, wherein thedeposition layer includes a gradient doping concentration, and has afirst surface and a second surface which are opposite to each other; thegradient doping concentration has a minimum value at the first surface;a buffer layer formed on the deposition layer; and an epitaxial layerformed on the buffer layer, and the epitaxial layer is mainly formed ofgroup III-V nitride; wherein, the substrate and the deposition layer areformed of homogeneous material; the deposition layer includes a gradientresistivity which includes a high impedance layer region which has aresistivity at least greater than 1500 ohm-cm.
 2. The epitaxialsubstrate of claim 1, wherein the gradient resistivity has a maximumvalue at the first surface of the deposition layer.
 3. The epitaxialsubstrate of claim 1, wherein a thickness of the high impedance layerregion is smaller than or equal to 6 μm.
 4. The epitaxial substrate ofclaim 1, wherein a thickness of the high impedance layer region issmaller than or equal to 2 μm.
 5. The epitaxial substrate of claim 1,wherein a resistivity of the high impedance layer region is greater than7000 ohm-cm.
 6. The epitaxial substrate of claim 1, wherein the gradientdoping concentration of the deposition layer decreases from the secondsurface to the first surface.
 7. The epitaxial substrate of claim 1,wherein the dopants of the deposition layer and the substrate are thesame.
 8. The epitaxial substrate of claim 1, wherein the depositionlayer at least includes a first stacked layer and a second stackedlayer, wherein the first stacked layer is disposed on the substrate andbetween the substrate and the second stacked layer; the second stackedlayer is disposed on the first stacked layer.
 9. The epitaxial substrateof claim 8, wherein a doping concentration of the first stacked layer issmaller than or equal to that of the substrate.
 10. The epitaxialsubstrate of claim 8, wherein the dopants of the first stacked layer andthe substrate are different.
 11. The epitaxial substrate of claim 8,wherein the dopants of the first stacked layer and the second stackedlayer are different.
 12. The epitaxial substrate of claim 8, wherein thegradient resistivity has a maximum at the first surface of thedeposition layer.
 13. The epitaxial substrate of claim 1, wherein thesubstrate is a heavily doped substrate and the doping concentration isequal to or greater than 1×10¹⁸ atom/cm³.
 14. The epitaxial substrate ofclaim 8, wherein the substrate is a heavily doped substrate and thedoping concentration is equal to or greater than 1×10¹⁸ atom/cm³.
 15. Amethod for forming an epitaxial substrate, comprising: A. providing asubstrate; B. forming a deposition layer on the substrate, wherein thedeposition layer and the substrate are formed of homogeneous material;the deposition layer includes a gradient doping concentration and has afirst surface and a second surface which are opposite to each other; thegradient doping concentration has a minimum value at the first surface;the deposition layer includes a gradient resistivity which includes ahigh impedance layer region having a resistivity at least greater than1500 ohm-cm; C. forming a buffer layer on the deposition layer; and D.forming an epitaxial layer on the buffer layer, wherein the epitaxiallayer is mainly formed of group III-V nitride.
 16. The method of claim15, wherein the gradient doping concentration of the deposition layerdecreases toward the first surface.
 17. The method of claim 15, whereinthe dopants of the deposition layer and the substrate are the same. 18.The method of claim 15, wherein the deposition layer at least includes afirst stacked layer and a second stacked layer; the first stacked layeris formed on the substrate first, and the second stacked layer is formedon the first stacked layer in step B.
 19. The method of claim 18,wherein a doping concentration of the first stacked layer is smallerthan or equal to that of the substrate.
 20. The method of claim 18,wherein the dopants of the first stacked layer and the substrate aredifferent.
 21. The method of claim 18, wherein the dopants of the firststacked layer and the second stacked layer are different.
 22. The methodof claim 15, wherein the substrate is a heavily doped substrate having adoping concentration which is equal to or greater than 1×10¹⁸ atom/cm³.23. The method of claim 18, wherein the substrate is a heavily dopedsubstrate having a doping concentration which is equal to or greaterthan 1×10¹⁸ atom/cm³.